Computer Systems: A Programmer's Perspective (3rd Edition)
Computer Systems: A Programmer's Perspective (3rd Edition)
3rd Edition
ISBN: 9780134092669
Author: Bryant, Randal E. Bryant, David R. O'Hallaron, David R., Randal E.; O'Hallaron, Bryant/O'hallaron
Publisher: PEARSON
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Chapter 9.3, Problem 9.2PP
Program Plan Intro

Page table entries (PTEs):

A page table is a collection of page table entries. In the virtual address space, each page has a page table entries at a fixed offset.

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Problem 0. The following table gives some of the parameters for a number of different hardware caches. Fill in the table with the values of the missing parameters. Recall that m is the number of physical address bits, C is the cache size in bytes, B is the block size in bytes, E is the associativity, i.e., lines per set, S is the number of sets, t is the number of tag bits, s is the number of set index bits, and b is the number of block offset bits. Cache m 48 32030 (b) 48 32 24 24 C B E 16384 32 16 32768 64 65536 128 512 32 1024 8 8 4 14 1 4 S b S t
5. Suppose that a machine has 38-bit virtual addresses and 32-bit physical addresses. a) What is the main advantage of a multilevel page table over a single-level one? b) With a two-level page table, 16KB pages, and 4-byte entries, i. How many bits should be allocated for the top-level page table field? ii. How many bits should be allocated for the next level page table field?
Q.No.8: In paging (given diagram), for CPU request there are two access time one for accessing page table and one for physical memory access. physical address f0000..0000 logical address CPU a) How should we minimize this access time? Redraw 1111...1111 the figure. b) Formulate the formula for Effective Access Time. c) Calculate Access Time (EAT) by assuming the Hit ratio (a ) the Effective physical memory 85% and 95%. Cache page table Access Time (ɛ) is 20 microsecond and Memory Access Time (T) is 100 microsecond.
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