6.q3 3. Given the following 6 bit “R-2R" D/A converter:R11wR10wR9R8R7www10ΚΩ10ΚΩ10ΚΩ10ΚΩ10ΚΩA R= 8VR12V1R6R5R4R3R2R120ΚΩ20ΚΩ>20kQ20ΚΩ20ΚΩ20ΚΩ20ΚΩ+S5S4S3S2S1Key = SpaceKey = SpaceKey SpaceKey = SpaceKey = SpaceDetermine:(1) resolution (in mV/bit)°SOKey Space(2) Vo, if the Digital Input(3) Maximum Vo=101111 (2)V212VསྶརྦེHITHR13w10ΚΩU1VoV3741-DIV12V

Answered: Image /qna-images/answer/0d898bfe-d0fa-48cc-990b-b7fa99bdaa05.jpg

Answered: 3. Given the following 6 bit “R-2R" D/A…

Introductory Circuit Analysis (13th Edition)

13th Edition

ISBN:9780133923605

Author:Robert L. Boylestad

Publisher:Robert L. Boylestad

Chapter1: Introduction

Section: Chapter Questions

Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...

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BkcBZYhc850ZmX4-RzV7i6yWprtMcdra5me-w_Og/formResponse The DAC with inputs and outputs shown in figure below, the fault in the circuit is in note (all the values is in approximate range ) RF R1 200 120k U1 R2 60k R3 741 30k R4 15k - 13.2 mV - 15.6 mV - 29.9 mV -65.6 mV -79.9 mV - 82.2 mV - 96.5 mV R1 O R2 0000 0010 0100 0110 000 1001 1010 1011 1101 1110 III 0000
Q 1. Determine the output voltage of the Digital-to-Analog Converter (DAC) in Figure 1(a) and plot it in Figure 1(c). The sequence of the four digit binary codes represented by the waveforms in Figure 1(b) are applied to the inputs. A high level is a binary 1and a low level is a binary 0. The least significant binary digit is Do. Do o D₁ 0- 200 ΚΩ www D₂ 0 100 ΚΩ www 50 ΚΩ www 25 ΚΩ D3 0 M 0 -0.25 -0.50 -0.75 -1.00 -1.25 -1.50 -1.75 -2.00 -2.25 -2.50 -2.75 -3.00 -3.25 -3.50 -3.75 (a) Vout (V) R₁ 10 ΚΩ o Vout +5 V Do 0 +5 V D₁ 0 +5 V 0 +5 V 0 D₂ D3 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 non (c) Figure 1 I 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 ||||| (b) Binary input
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A 3-bit binary weighted resistor DAC and a 3-bit R-2R ladder DAC have common values of Vref = 5V, R = 1kN, R = 2kN. Compare their output voltages for each of the following binary inputs. What do you observed? Binary Weighted Resistor DAC Resolution Binary input R-2R Ladder DAC Output voltage Resolution Output voltage 000 001 010 011 100 101 110 111
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Q2. Consider the following RISC-V loop: (i) (ii) (iii) (iv) (iv) (v) (vi) (vii) LOOP: beq x6, addi x6, x6, -1 add x11, x11, x5 addi x5, x5, 2 slli x7, x5, 1 beq x0, x0, LOOP beq x11, x0, DONE 2 | Page Assume that the register x6 is initialized to the value 5, x5 and x7 to the value 0, and x11 to the last digit of your student ID. All these initializations are performed using RISC-V instructions. Fill out the table below. Final value of x5 at the end of execution Final value of x7 at the end of execution Total number of instructions executed DONE: add x12, x11, x19 microarchitecture x0, DONE Number of cycles needed to execute these instructions in a single cycle microarchitecture Number of cycles needed to execute these instructions in a multi-cycle
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