Use 4-bit version (result 8-bit), do the division with the given data 5ten (dividend) and 2ten (divisor), or 0101two and 0011two. Use Algorithm1 only that has 64-bit ALU
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Question 33334
Computer Architecture
Use 4-bit version (result 8-bit), do the division with the given data 5ten (dividend) and 2ten (divisor), or 0101two and 0011two. Use Algorithm1 only that has 64-bit ALU.
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- Question 7 Assume we are using the simple model for floating-point representation as given in this book (the representation uses a 14-bit format, 5 bits for the exponent with a bias of 15, a normalized mantissa of 8 bits, and a single sign bit for the number). 01011011001000 + 00111010000000 = ?You are asked to design a system of FP numbers representation (with your own design choices), labeled Custom_FP_48, for which we have 48 bits at our disposal in order to represent a number, in analogy with the IEEE 754 prototype. You are asked to provide: a) The types for evaluating this number b) The width of representation of these numbers (upper and lower) c) The maximum precision (i.e., the minimum difference between two successive numbers).Questi on 1: This problem covers 4-bit binary multiplication. Fill in the table for the Product, Multiplier and Multiplicand for each step. You need to provide the DESCRIPTION of the step being performed (shift left, shift right, add, no add). The value of M (Multiplicand) is 1100, Q (Multiplier) is initially 0111. Product Multiplicand Multiplier Description Step 0000 0000 0000 1100 0111 Initial Values Step 0 Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8. Step 9 Step 10 Step 11 Step 12 Step 13 Step 14 Step 15
- ASCII Codes can be helpful to find binary code of different decimal numbers and alphabets etc. You have to consider 65 and its equivalent code of 16 bits will be considered for bit sequence and a divisor for CRC. Follow this process; first 8 bits will be used for data while next 4 bits will be used for divisor (if there are 4 zeroes in your case then replace with 1001), neglect last 4 bits. Also check your answer.(a) The infix representation is P /(Q + R) ∗ X − Y(b) The postfix representation is X Y Z P QR ∗ +/ − ∗(c) The prefix representation is + ∗ −M N P /RSIf the floating-point number representation on a certain system has a sign bit, a 3-bit exponent and a 4-bit significand: What is the largest positive and the smallest positive number that can be stored on this system if the storage is normalized? (Assume no bits are implied, there is no biasing, exponents use two's complement notation, and exponents of all zeros and all ones are allowed.) What bias should be used in the exponent if we prefer all exponents to be non-negative? Why would you choose this bias?
- Assume we are using the simple model for floating-point representation discussed in the class (the representation uses a 14-bit format, 5 bits for the exponent with an Excess-M, a significand of 8 bits, and a single sign bit for the number): Convert -43.0735 to the floating-point binary representation. (Remember we learned "implied one" format in the lecture)6. Assume we are using a simple model for floating-point representation similar to the one used in Chapter 2 of the textbook which has a 14-bit format, 5 bits for the exponent with a bias of 15 (not 16 as in the textbook), a normalized mantissa of 8 bits, and a single sign bit. Show how the computer would represent the numbers 12.125 using this representation.1. In AES, suppose round key for round 1 (in hexa-decimal) is: FA 14 75 95 93 55 6D A6 68 53 A9 CA OB 6D BB D9. Compute round key for round 2. (Step by step computation is expected). 2. In DES key generation, let the 64-bit Key input 'K' (in hexadecimal) be "13579BDF02468ACE". Perform necessary computations and generate the 48-bit subkeys K1 (Round-1 subkey) and K2 (Round-2 subkey). (Step by step solution is required) Tanishq
- Assume we are using the simple model for floating-point representation discussed in the class (the representation uses a 14- bit format, 5 bits for the exponent with an Excess-M, a significand of 8 bits, and a single sign bit for the number): Convert 22.375 to the floating-point binary representation. Your Answer:Scenario: In a biased N-bit binary number system with bias B, positive and negative numbers are represented as their value plus the bias B. For example, for 5-bit numbers with a bias of 15, the number 0 is represented as 01111, 1 as 10000, and so forth. Biased number systems are sometimes used in floating point mathematics. Consider a biased 8-bit binary number system with a bias of 12710 Question: What is the representation and value of the most negative number?Fetch Decode Execution Cycle Assignment Disassemble the following program (i.e., convert it back to assembly language) and determine what the program does. Refer to op-codes chart provided. (A Number Bit set to 1— Operand is a number) # Machine Code 0 001 1 000111 1 010 0 001101 2 001 1 000100 3 010 0 001110 4 001 0 001101 5 100 0 001110 6 010 0 001111 Op-code Mnemonic 001 LOAD 010 STORE 011 ADD 100 SUB 101 EQUAL 110 JUMP 111 HALT NB: Every stage must be present in a separate diagram with the description of the stage’s processes below. Extra marks would be allocated for neat and detailed work presented.