Suppose that the processor has access to two levels of memory. Level 1 contains 1000 data words and has an access time between the CPU and L1 of 2.5 nanoseconds (2.5E-9 sec); level 2 contains data 100,000 words and has an access time between L1 and L2 transfers of 5.0 nanoseconds (5.0E-9 sec) Assume that data requests by the CPU have a hit ratio, H in the L1 cascade of 0.7, and any requests missed in L! Are guaranteed to be found in L2. What is the average memory assess time in nanoseconds for data requests by the CPU?

Suppose that the processor has access to two levels of memory. Level 1 contains 1000 data words and has an access time between the CPU and L1 of 2.5 nanoseconds (2.5E-9 sec); level 2 contains data 100,000 words and has an access time between L1 and L2 transfers of 5.0 nanoseconds (5.0E-9 sec) Assume that data requests by the CPU have a hit ratio, H in the L1 cascade of 0.7, and any requests missed in L! Are guaranteed to be found in L2. What is the average memory assess time in nanoseconds for data requests by the CPU?

Name: Suppose that the processor has access to two levels of memory. Level 1
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Description: Suppose that the processor has access to two levels of memory. Level 1 contains 1000 data words and has an access time between the CPU and L1 of 2.5 nanoseconds (2.5E-9 sec); level 2 contains data 100,000 words and has an access time between L1 and L

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 2PE: If a microprocessor has a cycle time of 0.5 nanoseconds, what’s the processor clock rate? If the...

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With drawing Compute the Average access time for memory system when the time for Main Memory is 2000 ns, the time for cache is 200 ns and hit ratio is 0.9?
Assume the CPU has access to two types of memory. Level 1 has 1000 data words and has an access time of 2.5 nanoseconds (2.5E-9 sec) between the CPU and L1; level 2 contains 100,000 data words and has an access time of 5.0 nanoseconds between L1 and L2 transfers (5.0E-9 sec) Assume that the CPU's data requests have a hit ratio, H, of 0.7 in the L1 cascade, and that any requests missed in L! are assured to be found in L2. What is the average memory assessment time in nanoseconds for CPU data requests?
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