Question: How do you change the datapath below to enable unconditional jumps (j)? Draw the necessary wires, logic units, and control signals in the datapath, and explain your design. Hint: "Jump" control signal will be generated from the controller, and it is true if instruction opcode is represent “J-type” instruction. Where the control signal will be connected to? We want to add unconditional jump to the processor datapath shown here. Here is what we need and where they are coming from. PC 4 Add Read address Instruction [31-0] Instruction memory Instruction [31-26] Control Instruction [25-21] Instruction [20-16] Instruction [15-11]| Instruction [15-0] 0 RegDst Branch MemRead MemtoReg ALUOP MemWrite ALUSrc RegWrite Read register 1 Read register 2 16 Read data 1 Write register Write data Registers Read data 2 Sign- extend Instruction [5-0] 32 Shift left 2 OMUX, Add ALU control ALU result Zero ALU ALU result MUX Address Read data Write Data data memory MUX What do you need? Address for the jump Control signal to jump MUX to choose the jump address Where do they come from? Address comes from the instruction Control signal comes from the control logic
Question: How do you change the datapath below to enable unconditional jumps (j)? Draw the necessary wires, logic units, and control signals in the datapath, and explain your design. Hint: "Jump" control signal will be generated from the controller, and it is true if instruction opcode is represent “J-type” instruction. Where the control signal will be connected to? We want to add unconditional jump to the processor datapath shown here. Here is what we need and where they are coming from. PC 4 Add Read address Instruction [31-0] Instruction memory Instruction [31-26] Control Instruction [25-21] Instruction [20-16] Instruction [15-11]| Instruction [15-0] 0 RegDst Branch MemRead MemtoReg ALUOP MemWrite ALUSrc RegWrite Read register 1 Read register 2 16 Read data 1 Write register Write data Registers Read data 2 Sign- extend Instruction [5-0] 32 Shift left 2 OMUX, Add ALU control ALU result Zero ALU ALU result MUX Address Read data Write Data data memory MUX What do you need? Address for the jump Control signal to jump MUX to choose the jump address Where do they come from? Address comes from the instruction Control signal comes from the control logic
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