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- Given the positive number 77. a) Represent the number as an eight–bit number in two’s–complement form. Also give the 2 character hexadecimal value. b) Represent the negative number –77 as an eight–bit number in two’s–complement form. Also give the 2 character hexadecimal value. c) Add the binary result for a to b to verify you get an eight-bit value of zero!ii) We want to digitise a signal that contains frequencies between 100 Hz and 1500 Hz, assuming 16 bits per sample. The digitised signal will be transmitted using a QPSK process. Determine the bit rate and the level rate.Question 4 a) The IEEE Standard 754 representation of a floating point number is given as: 01101110110011010100000000000000. Determine the binary value represented by this number. b) Convert each of the following hexadecimal values to binary. i) AB1916 ii) 2DEF16 iii) 8A4516 iv) 9B5A16 c) If a computer's system clock is 2.4 GHz, calculate the period of the system clock. d) If an 8-bit binary number is used to represent an analog value in the range from 200 ounces to 700 ounces, what is the resolution of the system?
- Most Digital transmission are "self-clocking " in that they derive the bit synchronization from the signal itself. To do this, the system use the transitions between positive and negative voltage levels. These transition help define the boundaries of the bit intervals. a) Plot the NRZ-L signal for the data stream 4 bits of 1s followed by 4 bits of Os. Explain why this code has a synchronization problem? b) Repeat part ) for Manchester encoding scheme and explain how the synchronization problem has been addressed.Scenario: In a biased N-bit binary number system with bias B, positive and negative numbers are represented as their value plus the bias B. For example, for 5-bit numbers with a bias of 15, the number 0 is represented as 01111, 1 as 10000, and so forth. Biased number systems are sometimes used in floating point mathematics. Consider a biased 8-bit binary number system with a bias of 12710 Question: What is the representation and value of the most positive number?Question 5 a) Briefly explain the Nyquist theorem in the context of digital sampling. b) Using logic gates, design an active low chip select for the memory a 256 K memory device starting at address 38000016 in a 16 Megabyte memory space. c) Convert each of the following 8-bit signed magnitude binary numbers to decimal. i) 10110101(base 2) ii) 01000101(base 2) iii) 11101010(base 2) iv) 01011110(base 2)
- The state diagram of a sequence which allows overlap is shown below. A sequence detector accepts input a string of bits:either 0 or 1. Its output goes to 1 when a target sequence has been detected. In a sequence detector that allows overlap, the final bits of one sequence can be the start of another sequence. Using the state diagram given below and an input sequence 10110: A) Assign binary values to the states and derice the state table. B)derive the simplified state equations. c) Use JK flip-flop abd design a synchronous sequence detector circut. D) Is this Mealy or Moore model? Treat unused states as do not care conditionsAssume 8-bit values for the following questions: a) find the equivalent unsigned binary number of 68 (decimal number). b) convert your result from a) to a hexadecimal number. c) find the two's complement binary number for -68. d) verify the binary sum of your results from a) and c) is 0. Find the status of the flags of N Z, C, and V.Determine the binary values for which the following SOP expression is equal to 1: XYZ + XYZ + XYZ + XYZ + XYZ Is this a standard SOP expression? Determine the binary values for which the following POS expression is equal to 0: (X + Y + Z)(X + Y + Z)(X + Y + Z)(X + Ỹ + Ž)(X + Ỹ + Z) Is this a standard POS expression? Convert the expression (A + B)(B+C) to standard POS form.
- calculate, the number of bits required for 8 quantization levels, quantization step size and level values when the input signal to the quantizer has peak to peak values of (-2,3).DIGITAL DESIGN COMP 231 Qution 1: I- Perform the subtraction with the following unsigned binary numbers by taking the 2's complement of the subtrahend.a. (0.1101 - 10110)ib. 0.11011 - 1001) II. Convert the followinga. 99710 =() 16b. 25710 =()sc. 65410 =() 2d. 10116=()10Question 3: a) Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full adders. Assume negative numbers are represented in 2's complement. (Hint: How do you make a 4-bit binary number into a 5-bit binary number, without making a negative number positive or a positive number negative?) b) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. Then design a circuit which will find the 2's complement of a 4-bit binary number. Use four half adders and any additional gates. (Hint: Recall that one way to find the 2's complement of a binary number is to complement all bits, and then add 1.)