e. Which of the following is not an I-type instruction? i. bne St1, St2, Label ii. slti St1, $t2, 3 iii. addi $t1, $t2, 3 iv. sll St1, St2, 3 Sol: iv f. Assuming you can use infinite number of CPUs for performance improvements, what would be the maximum speed up when the parallelizable portion is 90% of total execution time? i. 2 ii. 9 iii, 10

Systems Architecture
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ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter4: Processor Technology And Architecture
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Problem 15VE: A(n) ________________ instruction always alters the instruction execution sequence. A(n)...
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e. Which of the following is not an I-type instruction?
i. bne St1, St2, Label
ii. slti $t1,$t2, 3
iii. addi $t1, $t2, 3
iv. sll $t1,$t2, 3
Sol: iv
f. Assuming you can use infinite number of CPUs for performance improvements, what
would be the maximum speed up when the parallelizable portion is 90% of total execution
time?
i. 2
ii. 9
iii. 10
Transcribed Image Text:e. Which of the following is not an I-type instruction? i. bne St1, St2, Label ii. slti $t1,$t2, 3 iii. addi $t1, $t2, 3 iv. sll $t1,$t2, 3 Sol: iv f. Assuming you can use infinite number of CPUs for performance improvements, what would be the maximum speed up when the parallelizable portion is 90% of total execution time? i. 2 ii. 9 iii. 10
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