Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of vour design)

Electric Motor Control
10th Edition
ISBN:9781133702818
Author:Herman
Publisher:Herman
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
icon
Related questions
Question
Design the following combinational logic circuit with a
four-bit input and a three-bit output. The input
represents two unsigned 2-bit numbers: A1 A0 and B1
B0. The output C2 C1.C0 is the result of the integer
binary division A1 A0/B1 B0 rounded down to three
bits. The 3-bit output has a 2-bit unsigned whole part
C2 C1 and a fraction part CO. The weight of the fraction
bit CO is 21. Note the quotient should be rounded
down, i.e. the division 01/11 should give the outputs
00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up
to 0.5). A result of infinity should be represented as
11.1. A minimal logic implementation is not required.
(Hint: start by producing a truth table of your design).
Transcribed Image Text:Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).
Expert Solution
steps

Step by step

Solved in 2 steps with 2 images

Blurred answer
Knowledge Booster
Logic Gate and Its Application
Learn more about
Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, electrical-engineering and related others by exploring similar questions and additional content below.
Similar questions
  • SEE MORE QUESTIONS
Recommended textbooks for you
Electric Motor Control
Electric Motor Control
Electrical Engineering
ISBN:
9781133702818
Author:
Herman
Publisher:
CENGAGE L