3. Logic Design a. Create the truth table of a 3-input AND gate. Realize the 3-input AND operation using only 2-input NOR gates. b. Create the truth table of a 3-input OR gate. Realize the 3-input OR operation using only 2- input NAND gates. c. Using AND and OR logic gates, implement the logic function: F(x, y, z)= xy + yz + zx
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- Implement the function, W using ONE 4-to-1 multiplexer and other logic gates. b) Implement the function, X using ONE 4-to-1 multiplexer and other logic gates. Implement the function, Y using TWO 4-to-1 multiplexer and other logic gates. d) Implement the function, Z using ONE 8-to-1 multiplexer and other logic gates. Table Q1 ВCD Braille A B D W Y 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A ololODraw the equivalent logic circuit diagram of the following expressions : a. XY = F b. X + Y = F XÝZ = F c. d. XY + XZ = F e. XYZ + XÝZ = F1. a. i. Draw the gates required to build a half adder are ii. When simplified with Boolean Algebra (x + y)(x + z) simplifies to : iii. The output of a logic gate is 1 when all its inputs are at logic 0, the gate is either :
- An X-input exclusive-OR gate and a Y-input exclusive-OR gate (where X=3, Y=4 have their outputs connected to a 2-input exclusive-NORgate. Do the following:a) Draw the logic diagram and analyze the logic expression of the output (in standard SOPform).b) List out all essential prime implicants.a) For the given logic circuit diagram write the program by using the gate level modeling. b) For the given truth table write the program by using the data flow Modelling. c) Write the test bench of the given logic circuit with all possibilities Y1 Y2 Y3 Y4 Y5 Y6 Y7 A2 A1 A0Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)Or you can use 74HCxx versions. Task 2: 4 INPUT PRIORITY ENCODERa) Write the truth table.b) Find the outputs in terms of min terms using minimal expression.c) By using K map, find the simple/simplest expression of theoutputs.d) Draw the circuit diagram. (Simulation design will be accepted.)e) Simulate the circuit & explain your results. (Please do notdesign separate simulations for each output. You should design ONEsimulation including all inputs and outputs.)
- Question 4: For the number display below, we would like to identify Boolean expression for LEDS (outputs a through g2) that indicate numbers 11, 14, and 15. a. Please write the Boolean expressions for the two LEDS (outputs a through g2) based on the input signals So to S3. You do not need to simplify the Boolean expressions. b. Please draw the logit circuit for outputs a through g2 a2 Logic circuit 2. 88 5,5,5,50Consider the multiplexer based logic circuit shown in the figure MUX MUX 1 Select one: a. W S1' S2' O b. W + S2 + S1 c. WS1 + WS2 + S1 S2 O d. WeS1es2USE DIGITAL LOGIC AND DESIGN Part 1: In Figure_4; we have 4-bit Comparator using 2-bit Comparators block. You have to satisfy given condition by applying all data on figure 4. At the end, given condition should produce HIGH output and other two should be LOW. A3 A2 A1 A0 = 1101 and B3 B2 B1 B0 = 1110 Figure_4 Part 2: The serial data-input waveform (Data in) and data-select inputs (S0 and S1) are shown in Figure_5. Determine the data-output waveforms from D0 through D3. Figure_5 Part 3: Decoder can be useful when we have to decode some specific numbers from their equivalent code. Figure 6 has a concept of 3 to 8 line decoder from which you have to generate output waveform from D0 to D7 with proper relationship to input. Figure_6 Part 4: The data-input and…
- (c) Figure Q5(c) shows a logic circuit which has three inputs A, B, C and two outputs F and G. i) Obtain the logic expression for the outputs G and F. ii) Redesign the circuit using only 3-to-8 decoder (with active high outputs) and OR gates. G A B F Figure Q5(c)1. Design a logic circuit with four inputs A,B,C,D as shown in figure1 and one output Y and whose output will be high if only the input is evenly divisible by 3. A B LY D Figure1 I. Find the SOP Boolean expression of the output Y. I. Draw logic circuit using basic gate and verify the result by using any simulation tools. II. Draw a logic circuit by using NAND gate only. |Discussion: 1. Simplify the following logical expression and implement them using suitable logic gates a = E2,4,6,10,14 b. F = I12,3,6 2 Determine whether or not the following equalities corect: a. A+B.C+Õ C = BC b. B(AO) +B C+ ACBOc) = AC 3. Convert the following expressions to SOP forms: A (A +B. C) -B b. (A + C)(Ã-B-Č+A.C-D) * 4. Write a Boolean expression for the following statement: Fisa "1" if A, B&C are all 1's or if only two of the variable is a"0". %3D * 5. Fing F