2. Design a 4-bit binary up counter (like the following state diagram) using JK flip flops. State diagram. eg. 00000001 Present state A; A₂ A₁ Ap 1111 (a) Draw the state table with the input values for J K flip flops Next state Flip-flop Inputs A3 A₂ A₁ Ap JA3 KA3 JA2 KA2 JAI KAI JAOK AD

2. Design a 4-bit binary up counter (like the following state diagram) using JK flip flops. State diagram. eg. 00000001 Present state A; A₂ A₁ Ap 1111 (a) Draw the state table with the input values for J K flip flops Next state Flip-flop Inputs A3 A₂ A₁ Ap JA3 KA3 JA2 KA2 JAI KAI JAOK AD

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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Question

2. Design a 4-bit binary up counter (like the following state diagram) using JK flip flops.
State diagram.
eg.
0000-0001
Present state
A3 A₂ A₁ A₂
0 0 0 0
0 0 0 1
(a) Draw the state table with the input values for J K flip flops
Next state
A; A₂ A₁ A
00 0 1
001 0
1111
Flip-flop Inputs
JA3 KA3 JA2 KA2 JAI KAI JAO KAO
0 X 0 X 0
1
x
0
x
0
x
1
x 1
(b) Simplify the input equations by K map
(c) Draw the logic diagram

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