CT212-Week2Lab_Justice

Task 3: Digital logic circuit analysis - Finding the Boolean expression of a given circuit Find the Boolean expression of the following circuit, draw the circuit on EWB and simulate it to fill-in its truth table shown below. W = Note: the logic converter tool from EWB to fill-in the following table. For that, you need to connect the A, B and C inputs of the logic converter to X, Y and Z lines, respectively. Further, you need to connect the "out' line of the logic converter to W. As shown in the following diagram DAB Logic Converter 00000000 A CDE FOH Conversions Al - 10 Y W ****-***

you should first design a signal conditioning device and calculate the corresponding values and then do simulations for the designed circuit to verify your answers. (You can use any circuit design software that you prefer). Please include your circuit schematic and related input-output figures for your simulation. Assume that for a given accelerometer sensor the measured output voltage is 15 mV /g. (g is the acceleration expressed with respect to the Earth gravity i.e., 1 g = 9.8 m/g2) For this accelerometer design a suitable signal conditioning device capable of generating an output voltage of 0.27 V for each velocity unit m/s. For your design calculate the required gain of the device and determine the ratio of the resistances in the feed back. Draw your designed signal conditioning device in any circuit design software that you prefer and verify your design. Please include your system's schematic circuit and the resulting input-output figures in your answer sheet. I. I.

Task 5: Logic circuits with multiple outputs Find the Boolean expression of the outputs of the following circuit, D = E = Draw the circuit on EWB and simulate it to fill-in its truth table shown below (use logic converter please). Note: You need to use the logic converter two times, once for the output D, and another time for the second output E.

Appendix A: Default Prelab Assignment Use Mixed Logic to design a circuit to implement the expression given by the instructor using only the gates allowed. The default expression (if none is given by the instructor) is Part A): Use mixed logic to design an implementation for F=AB+Cusing only NOR and NOT gates. Complete your work here. Draw your final design using only the NOR and NOT gate symbols. Give the truth table for this expression.

Task In your group, design and simulate a combinational logic circuit that consists of three or four inputs and at most three outputs. You are required to come up with your own problem and solution, which can by anything related to the environment, relationships, people, vehicles, machines, etc. You need to perform the following: > In your group, brainstorm a suitable problem to be solved > Devise a concise description of the problem > Draw a block diagram of the problem > Develop the truth table for the problem > Solve the minimum expression for the problem using K-Map Implement the logic circuit using basic gates > Realize your design using the Intel Quartus Prime software by schematic entry • Create a new project in Quartus II • Create a new Block Diagram/Schematic File and draw your circuit • Compile your design • Perform a timing simulation of your design > Verify that your system functions correctly Submission Each group will need to submit a report (at E-learning website) which…

Using logic gates, design a circuit that has a capability to perform 4 bit binary addition or subtraction based on the choice of the user. The circuit should accept decimal numbers from the users and the sum will be displayed in a seven segment. Test the designed circuit in a simulation and submit screenshots of sample inputs and outputs. Include in your submission your KMAP Solutions, truth tables and sample manual calculations.

Create VHDL files using dataflow, structural and behavioral modeling of any logic gates (choose one - or, nand, nor, xor, xnor) except AND gate. 3 projects – 1 main circuit and 1 testbench for each project You may use and_gate_tb testbench.

Module 2 Coursework Copy then solve the following problems and show the step-by-step solution.Submit a copy of your work in PDF format along with your e-signature and upload using the providedlink. Provide screenshot for the circuit simulation using any of the recommended circuit simulators.Please be reminded that if the submitted activity is unclear or unreadable there is NO credit.Implement the combinational circuit for the following problems. Show the complete truth table and thepropositional expression for each of its output. Simulate using a circuit simulator using switches asinputs and LED as output indicators. Use only 2 input logic gates in the design and then provide ascreenshot of 2 different input values with its output result.Implement the design of a 2 bit input two’s complement converter . The 2 bit inputs are labeled AB (A =MSB, B = LSB) and the 3 bit two’s complement outputs are labeled XYZ (X = MSB, Z = LSB).

Using logic gates, design a circuit that has a capability to perform 4 bit binary addition orsubtraction based on the choice of the user. The circuit should accept decimal numbers from the users andthe sum will be displayed in a seven segment. Test the designed circuit in a simulation and submitscreenshots of sample inputs and outputs. Include in your submission your KMAP Solutions, truth tablesand sample manual calculations.

Develop a simple program in C# that receives two binary inputs from the user (graphical or command line) and outputs the result of the selected gate operation. Gate operations that should be selectable are AND, OR, XOR.

Create a logic circuit using only basic gates such as AND, OR, NOR, NAND, NOT, etc. to implement a Subtractor that is capable of subtracting the second number from the first, by converting the second number into its 2's complement form and then adding the resulting number to the first number. You do not need to worry about accomodating the addition or subtraction of negative numbers. Also, create a limited ALU (Arithmetic logic unit) circuit using Logism that implements a Full Adder circuit capable of adding 2 – 4 bit binary numbers and subtracting 2- 4 bit binary numbers. Also, implement the ability to select a bitwise AND operation and a bitwise OR operation. For the ALU it is acceptable to use the Adder and Subtractor circuits that are listed under the "Arithmetic" folder in Logism. (Logism tips and tricks are useful here for multi-bit pins, and how to set up different gates to support more than 1 bit. If using YOUR adder or subtractor circuit in your ALU that is not only acceptable…

Create an implementation using 2-input NAND gates only for the following equation. You may use inverter symbols internally and/or inversion symbols ( ) on the inputs as has been done in the example with the understanding that these would be replaced with 2-input NAND gates with inputs tied together. Be sure to minimize your SOP equations before conversion the NAND-only. f(a, b, c, d) = c'd + c(b' + d)

1a. Draw a circuit diagram using appropriate logic gates to implement a 3-bit comparator. Identifythe gates used in implementation and show its usage to compare two 3-bit words by writing thetruth table. b. Write the Boolean expression for the following 4 input circuit. Include sub-expressions foroutputs of each gate. c. Complete a truth table for the previous logic gate circuit in part b. d. Write the Boolean expression for the new circuit below. Then, simplify the following logic circuitusing the theorems in Boolean algebra. Show the steps clearly and specify the law used in eachstep. Finally draw the simplified circuit diagram.

Part2: Layout of basic logic gates (Layout) In this part you will design the layout the basic logic gates listed below. For each gate you have to: 1- Build the layout of the gate and show a snapshot of your work. 2- Show that your design is working by testing input combinations Required Gates: 1- 3-input NOR gate 2- 2-input NAND gate

CSI Task 2. (a) Consider the circuit below: D - Three gates have been taken out of the circuit. Place the gates in the circuit, you choose where and draw the completed circuit (you can copy this diagram into your submission). Then, write X as an unsimplified Boolean expression, and as a truth table (the truth table must show intermediate values) (b) You must design a combinational logic circuit to ring an alarm for the days that I need to go to work. The circuit has three inputs, forming the three bits of a binary number that represent the days of the week (0-Sunday, 1-Monday, ... up to 6-Saturday) The circuit is to have an output of 1 for three days of the week (you are to choose the days.) The output will be 0 for the rest of the days of the week. IN1 IN2 circuit OUT IN3 Design a logic circuit to implement OUT Do your design as a truth table, a Karnaugh Map (K-Map), a boolean expression and a logic eircuit,

Course: Digital Logic Design You have to solve the question step by step and clearly Please. You have to solve in a 1 hour. Question is well explained you have to read first carefully then answers properly in a single solution: Question 5:   Colors of different nature can be produced by mixing three fundamental colors that are red, green and blue. Consider you are assigned a task to design a digital system that is equipped with three different LEDs and four different color sensors. One LED is red (symbolized with R), one is green (symbolized with G) and one is blue (symbolized with L) while one sensor detects white color (symbolized with W), one detects black color (symbolized with B), one detects cyan color (symbolized with C) and one sensor detects magenta color (symbolized with M). It is known that each color sensor produces logic 1 output if and only if when an object of its corresponding color passes in front of it, otherwise logic 0. Each LED turns on when logic 0 is provided to…

Goal AIM/OBJECTIVE (similar to the manual): This is an exercise in designing combinational circuits that can perform 4bit Full Adder and Half Adder. Write a Verilog Behaviour model program for 4bit Full Adder and Half Adder with truth table and circuit diagram.

Task 1: Create an RS latch with NAND gates as shown in lecture in Logic Circuit.  Develop a truth table to describe the operation of the RS latch. Task 2:  Using the RS latch as a sub circuit, create a D-Latch.  Develop the truth table to describe its operation. Task 3: Building from the D-Latch, create a D Flip Flop and develop the truth table to describe its operation. Need the schematic please

Propositional logic is used in the creation of conditional logic for software programs in cases where the Boolean test is required. For example, ladder logic used by PLC (programmable logic controller) programmers control the response to a circuit being in an open or closed state, based on specific conditions stated in the logic. PLCs are used in numerous environments, such as manufacturing product lines, elevators, and many industrial applications. What other computer-science or IT jobs rely on propositional logic?

FACTS: In Module 3, you have learned about Op-Amps like Inverting and Non-Inverting Amplifier and many more, one of the topics in Module 3 is the Integrator and Differentiator. An operational amplifier (op-amp) integrator is an operational amplifier circuit that performs the mathematical operation of integration with respect to time-this means the output voltage is proportional to the input voltage integrated over time. A differentiator is an op amp-based circuit, whose output signal is proportional to the differentiation of the input signal. An op-amp differentiator is basically an inverting amplifier with a capacitor of suitable value at its input terminal. The electric potential of inverting terminal is also zero, as the opamp is ideal. QUESTION: Answer the ff. 1. What are the problems in an ordinary op-amp integrator? 2. Why op-amp integrator output is linear? 3. What are the problems in an ordinary op-amp differentiator? 4. What are the advantages of integrator and differentiator…

Task 3: Digital logic circuit analysis - Finding the Boolean expression of a given circuit Find the Boolean expression of the following circuit, draw the circuit on EWB and simulate it to fill-in its truth table shown below. W = Y

By using MATLAB software with detail solution solve the circuit shown in the Figure attached that consists of a resistor and a capacitor and is thus called an RC circuit. If we apply a sinusoidal voltage , called the input voltage, to the circuit as shown, then eventually the output voltage  , will be sinusoidal also, with the same frequency but with a different amplitude and shifted in time relative to the input voltage. Specifically, if oi Ai sinwt, then oo =Ao sin(wt+o) ,   The frequency response plot is a plot of Ao/Ai versus frequency. It is usually plotted on logarithmic axes.   Upper-level engineering courses explain that for the RC circuit shown, this ratio depends on and RC as follows:   where . For RC=0.1 s, obtain the log-log plot of versus  and use it to  nd the range of frequencies for which the output amplitude Ao is less than 70 percent of the input amplitude Ai.

Part a Design a logic circuit using the truth table Inputs output shown. Use only basic logic gates (AND, OR, NOT). Also, the circuit should use the FEWEST number of gates and the FEWEST number of inputs to the gates. Fully label all the inputs and outputs. a b. 1 1 1 1 1. 1 1 Part b Implement a 3-input XOR gate using only a 4x1 multiplexer and an inverter. Also complete the truth table in your answer sheets with the correct labels and function solution. Fully label all inputs and outputs. Part c Design a full-adder using half-adders and A- additional logic using the half-adder shown here. Pi Gi

Implement using Multiplexer 8:1 with residual variable. Please draw it using the logic gates, the circuit diagram. Do not draw the multiplexer chip per se. F=min(1,4,5,13,14,15)

PLEASE EXPLAIN ALL STEPSDraw (hand draw or using an online tool) the circuit diagrams that correspond to the following Boolean equations (Do not simplify!): xz + (xy + ~z) ~xyz + yz + x~y

1. The following expression uses an XOR gate. Recall that XOR is a combination of AND, OR and NOT gates. Remember that XOR is the lowest order of operator precedence. F = X * YOY+Z a. Draw the circuit as is with the XOR gate. b. Rewrite the expression replacing the XOR with its equivalent AND/OR/NOT gates. c. Draw the circuit for the revised expression in part b. d. How many total gates are used in your circuit for part a and how many for part b/c? Note that a NOR as 2 gates, an OR and then a NOT.

Digital Logic Design : Design NOR base SR Flip Flop in Any Software. Take a screenshort of circuit And Also Create A table of a circuit Write an explanation on it.

Which of the following is true for the two verilog codes given? 1. Behavioral design level is used. II. Output(y) is equal to logic 1 and the text "y-logic 0" appears in the simulation. III. The combinational circuit designed in the code includes 3 logic gates. IV. A net has to be added to the code for the output. `timescale lns / lps module mainfunction (input a, b, c, output y); assign y=(a&b) | (alc); endmodule timescale ins/lps module testbench; reg a,b,c; mainfunction dt (.a (a),.b (b), .c (c),.y(y)); initial begin a=0; b=0; c=0; #10 if (y!==1) $display("y-logic 0"); end endmodule

In matlab  Find the sum 1.5+3+5+7.5+10 using the sum function and the colon operator. Using doc function, determine what the dot-asterisk (.*) operator does. The combined resistance RT of three resistors R1, R2, and R3 in parallel is given byRT= 1/(1/R1)+(1/R2)+(1/R3)Create variables for the three resistors and store values in each, and then calculate the combined resistances